Abstracts

Processadores embarcados utilizam eficientemente o paralelismo a nvel de instruo para atender as necessidades de desempenho e energia em aplicaes atuais. Embora a melhoria de performance seja um dos principais objetivos em processadores em geral, ela pode levar a um impacto negativo no consumo de energia, uma restrio crtica para sistemas atuais. Nesta dissertao, apresentamos o SoMMA, uma arquitetura de memria gerenciada por software para processadores embarcados capaz de reduz consumo de energia e energy-delay product (EDP), enquanto ainda aumenta a banda de memria. A soluo combina o uso de memrias gerenciadas por software com a cache de dados, de modo a reduzir o consumo de energia e EDP do sistema. SoMMA tambm melhora a performance do sistema, pois os acessos memria podem ser realizados em paralelo, sem custo em portas de memria extra na cache de dados. Transformaes de cdigo do compilador auxiliam o programador a utilizar a arquitetura proposta. Resultados experimentais mostram que SoMMA mais eficiente em termos de energia e desempenho tanto a nvel de processador quanto a nvel do sistema completo. A tcnica apresenta speedups de 1.118x e 1.121x, consumindo 11% e 12.8% menos energia quando comparando processadores que utilizam e no utilizam SoMMA. H ainda reduo de at 41.5% em EDP do sistema, sempre mantendo a rea dos processadores equivalentes. Por fim, SoMMA tambm reduz o nmero de cache misses quando comparado ao processador baseline. Embedded processors rely on the efficient use of instruction-level parallelism to answer the performance and energy needs of modern applications. Though improving performance is the primary goal for processors in general, it might lead to a negative impact on energy consumption, a particularly critical constraint for current systems. In this dissertation, we present SoMMA, a software-managed memory architecture for embedded multi-issue processors that can reduce energy consumption and energy-delay product (EDP), while still providing an increase in memory bandwidth. We combine the use of software-managed memories (SMM) with the data cache, and leverage the lower energy access cost of SMMs to provide a processor with reduced energy consumption and EDP. SoMMA also provides a better overall performance, as memory accesses can be performed in parallel, with no cost in extra memory ports. Compiler-automated code transformations minimize the programmers effort to benefit from the proposed architecture. Our experimental results show that SoMMA is more energy- and performance-efficient not only for the processing cores, but also at full-system level. Comparisons were done using the VEX processor, a VLIW reconfigurable processor. The approach shows average speedups of 1.118x and 1.121x, while consuming up to 11% and 12.8% less energy when comparing two modified processors and their baselines. SoMMA also shows reduction of up to 41.5% on full-system EDP, maintaining the same processor area as baseline processors. Lastly, even with SoMMA halving the dataAdvisors/Committee Members: Carro, Luigi.