AbstractsComputer Science

Single issue instruction dispatcher based on Tomasulo???s algorithm

by Heema S. Shah




Institution: California State University – Northridge
Department: Department of Elec & Comp Engr
Degree: MS
Year: 2015
Keywords: Single issue; Dissertations, Academic  – CSUN  – Engineering  – Electrical and Computer Engineering.
Record ID: 2060383
Full text PDF: http://hdl.handle.net/10211.3/134468


Abstract

In order to achieve maximum throughput and efficiency, today???s processors employ various techniques and algorithms. Some of these would involve implementing multi-level cache, multiprocessor systems or exploring parallelism within instructions. Tomasulo???s algorithm by Robert Tomasulo has proved to be a major technique of exploiting the possibility of parallel and out-of-order execution of instructions. This project involves HDL implementation of Tomasulo???s algorithm on Xilinx ISE 14.2 using Verilog HDL. The algorithm consists of a scheduler which is the heart of the system responsible for eliminating structural and data hazards to allow efficient instruction execution.