AbstractsComputer Science

Designers of high-performance integrated circuits are paying ever-increasing attention to minimizing problems associated with interconnects such as noise, signal delay, crosstalk, etc., many of which are caused by the presence of a conductive substrate. The severity of these problems increases as integrated circuit clock frequencies rise into the multiple gigahertz range. In this thesis, a simulation tool is presented for the extraction of full-wave interconnect impedances in the presence of a conducting substrate. The substrate effects are accounted for through the use of full-wave layered Green's functions in a mixed-potential integral equation (MPIE) formulation. Particularly, the choice of implementation for the layered Green's function kernels motivates the development of accelerated techniques for both their 3D volume and 2D surface integrations, where each integration type can be reduced to a sum of D line integrals. In addition, a set of high-order, frequency-independent basis functions is developed with the ability to parameterize the frequency-dependent nature of the solution space, hence reducing the number of unknowns required to capture the interconnects' frequency-variant behavior. Moreover, a pre-corrected FFT acceleration technique, conventional for the treatment of scalar Green's function kernels, is extended in the solver to accommodate the dyadic Green's function kernels encountered in the substrate modeling problem. Overall, the integral-equation solver, combined with its numerous acceleration techniques, serves as a viable solution to full-wave substrate impedance extractions of large and complex interconnect structures.