Wireless LAN receiver with image rejection
Institution: | University of Johannesburg |
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Department: | |
Year: | 2014 |
Keywords: | Wireless LANs; Wireless communication systems; Network performance (Telecommunication) |
Record ID: | 1475492 |
Full text PDF: | http://hdl.handle.net/10210/12155 |
This dissertation presents a fully integrated image rejection receiver, the design of a wireless local area network receiver, by using CMOS transistors, including circuit implementations, as well as the design of a low noise amplifier, down conversion mixer, LC oscillators passive on-chip inductor, IF mixer, and low-pass filter based on CMOS active inductor. The study compares receiver topologies, heterodyne architecture, image rejection and associated problems, direct conversion, low- IF and wideband IF architecture, and DC offset, and presents the chosen circuit configurations for a 2.4 GHz CMOS wireless-LAN receiver. It also compares different topologies of a low noise amplifier, mixers, and oscillators. On-chip passive devices are also presented. The fully integrated image rejection receiver consists of a first stage LNA with input 2.4 GHz and NF equal to 2 dB , output of the LNA signal at 2.4 GHz, with a gain of 24 dB mixing with LC Local oscillator signal 1.2 GHz in the RF Mixer, and the out-mixing signal mixed again with the quadrature Oscillator 1.2 GHz in the IF Mixer. The final stage presents a differential low-pass filter based on a CMOS active inductor 100 MHz. This receiver design operates in the 2.4 GHz frequency. The ultimate aim of this project is to design a small-area IC chip and a low-power fullyintegrated 2.4 GHz CMOS receiver. CMOS was selected as the technology of choice because of its cost advantages in comparison with other processes.