AbstractsEngineering

Today multicore systems are quickly becoming the most commonly used hardware architecture  within embedded systems. This is due to that multicore architectures offer more performance at lower power consumption costs than singlecore architectures. However, since embedded systems are more limited in terms of hardware resources than desktop computers, the switch to multicore has introduced many challenges. One of the greatest challenges is that most existing programming models for interprocess communication are either too heavy for embedded systems or do not perform well on multicore. This thesis covers a study on interprocess communication for embedded systems and proposes a design that aims to bring the two most common standards for interprocess communication to embedded multicore. Furthermore, an  implementation that achieves efficient inter-core process communication using zero-copy shared memory is implemented and evaluated. It is shown that shared memory utilization yields much higher performance than conventional communication mechanisms like sockets.