Fault Tolerant Modular Multilevel Converter

by Idun Runde Mosgren

Institution: Norwegian University of Science and Technology
Year: 2014
Record ID: 1294354
Full text PDF: http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-26818


In this thesis work, fault tolerant control and operation of a Modular Multilevel Converter (MMC) has been investigated. The MMC consists of multiple Sub Modules (SM). The MMC technology is rapidly evolving, and research is ongoing to make it suitable for more applications. Uninterruptable power distribution is more crucial than ever due to an increasing dependence on electric power supply for several operations, and the cost related to blackouts. The modularity of the MMC is advantageous for uninterruptable operation. If one SM fails, it can easily be bypassed and the converter can continue to operate. For the MMC the availability is very high, although the amount of components leads to a lower reliability than some of the conventional multilevel converters.A new fault tolerant control has been developed based on an idea of modifying the reference waveforms that is used in the modulation. This is to maintain balanced line to line voltages. The method addresses faults that occur within one of the SMs. The advantage of this method is that existing redundancies in the non-faulty phases is used to maintain the same voltage amplitudes as in the pre-fault state. This can potentially reduce the cost of the converter.Investigation of the Reference Modification Method (RMM) has been done theoretically, by computer simulation and in the laboratory. Theoretically the RMM has proven valid. The commercial value of the method is assumed to depend greatly on the amount of SMs present in the design. The computer simulation results indicate that the voltages and currents remain balanced and with the same amplitudes as in pre-fault condition.The RMM shows great potential based on the results in this report. Steady state values from simulation and hardware differ with approximately 15 %. This deviation is expected to be caused by underestimation of resistive losses in the hardware circuit. When the RMM was run on the hardware setup, arm voltage measurements showed the expected shapes and amplitudes. The phase voltages show a deviation by 6-7% from the steady state values and the line voltages a deviation of 4-5%. Unexpected arm current peaks in the faulty phase were observed. It is expected that these occurred due to how the test was conducted and not the method to be tested. Further investigation of the method should be done to verify the results in this report.