|Keywords:||Network-on-Chip, Quality-of-Service, Self-Optimization, Scalability, Many-Core|
|Full text PDF:||http://digbib.ubka.uni-karlsruhe.de/volltexte/documents/3388180|
In this work, a scalable network on chip (NoC) for future many-core architectures is proposed and investigated. It supports different QoS mechanisms to ensure predictable communication. Self-optimization is introduced to adapt the energy footprint and the performance of the network to the communication requirements. A fault tolerance concept allows to deal with permanent errors. Moreover, a template-based automated evaluation and design methodology and a synthesis flow for NoCs is introduced.